دانلود پاورپوینت Architectural Analysis of a DSP Device, the Instruction Set and the Addressing Mode

دانلود پاورپوینت Architectural Analysis of a DSP Device, the Instruction Set and the Addressing Modes

نوع فایل: power point

فرمت فایل: pptx

قابل ویرایش

تعداد اسلاید : 50 صفحه

قسمتی از پاورپوینت :
FIR filter on ADPS-21x

DSP Requirements
Fast Multiply-Accumulates (Data-path)
Extended Precision Accumulator Register (Data-path)
Dual Operand Fetch (Memory)
Circular Buffering (Addressing)
Zero-Overhead Looping (Instruction set)

Analog Devices Architectures and Programming
SHARC
Blackfin
Performance Optimization

1. Obtain a sample with the ADC; generate an interrupt
2. Detect and manage the interrupt
3. Move the sample into the input signal's circular buffer
4. Update the pointer for the input signal's circular buffer
5. Zero the accumulator
6. Control the loop through each of the coefficients
7. Fetch the coefficient from the coefficient's circular buffer
8. Update the pointer for the coefficient's circular buffer
9. Fetch the sample from the input signal's circular buffer
10. Update the pointer for the input signal's circular buffer
11. Multiply the coefficient by the sample
12. Add the product to the accumulator
13. Move the output sample (accumulator) to a holding buffer
14. Move the output sample from the holding buffer to the DAC